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Creator:	Stanković, Momir R.
Title:	Projektovanje i realizacija upravljačkih sistema sa aktivnim potiskivanjem poremećaja
Copyright date:	2017
Permanent link:	https://phaidrani.ni.ac.rs/detail_object/o:1474?tab=0#mda
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Select license:	Autorstvo-Nekomercijalno-Bez prerade 3.0 Srbija (CC BY-NC-ND 3.0)
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Academic metadata

Theses Type:	Doktorska disertacija
Academic Expertise :	Tehničko-tehnološke nauke
University:	Univerzitet u Nišu
Faculty:	Elektronski fakultet
Group:	Katedra za automatiku

Other Theses Metadata

Alternative title:	Design and realization of active disturbance rejection control systems
Publisher:	[М. R. Stanković]
Format:	VII, 128 listova
description:	Bibliografija: listovi 112-120
description:	Datum odbrane: 09.03.2018.
description:	Automatic Control
Other responsibilities:	Naumović, Milica 1952- (mentor)
Other responsibilities:	Šekara, Tomislav (član komisije)
Other responsibilities:	Jovanović, Zoran (član komisije)
Other responsibilities:	Petrović, Branislav (član komisije)
Other responsibilities:	Simić, Slobodan (član komisije)
Abstract:	Active Disturbance Rejection Control (ADRC) is a recently proposed concept, which features high control performances and the minimal dependence on knowledge of the process model. Hence, ADRC represents a suitable solution for the industrial control applications, where the precise mathematical modeling of the process is limited. This dissertation deals with the design and realization of the ADRC controllers. The contribution of the research is reflected in the proposed modifications of the existing ADRC structures, which enable more efficient sinusoidal disturbances rejection and the sinusoidal reference tracking. The high performances and the robustness of the developed algorithms are demonstrated through the frequency domain analysis. Further, the optimal controller parameters tuning method, which is based on the genetic algorithm, is proposed. Compared to the conventional parameter tuning, it has been shown that the optimally tuned system, for the same robustness and noise sensitivity indexes, provides significantly better performances in terms of the external disturbance rejection and the reference tracking. The practical realization of the control systems, using Field Programmable Gate Array (FPGA) hardware, is analyzed. In this context, the features of the modern FPGA chips are considered and a detailed methodology for the control algorithm implementation, by the graphical system-level software tools, is suggested. In this way, the practical realization of the control system and the selection of the optimal hardware structure, as a tradeoff between the system performances and resource occupancy, are simplified. Consequently, the proposed methodology contributes to reducing the gap between FPGA technology and the control system designers. The developed control system solutions are experimentally tested in the laboratory environment on the three-axis didactic radar platform. The obtained results of the axes tracking performances confirm the efficiency of the proposed control algorithm and its FPGA realization.
Authors Key words:	Upravljanje sa aktivnim potiskivanjem poremećaja; Potiskivanje poremećaja; Frekvencijska analiza; Optimalno podešavanje parametara; Genetski algoritam; Field Programmable Gate Array- FPGA tehnologija; Optimalna hardverska realizacija; Višeosni sistemi upravljanja; Eksperimentalna verifikacija
Authors Key words:	Аctive Disturbance Rejection Control (ADRC); Disturbance rejection; Frequency domain analysis; Optimal parameters tuning; Genetic algorithm; Field Programmable Gate Array-FPGA; Optimal hardware design; Multi-axis system control; Exprimental verification
Classification:	681.515(043.3)
Subject:	004.021+519.6]:681.5.015(043.3)
Subject:	P 170
Language:	Serbian
Identifier:	533955734
Type:	Elektronska teza

Abstract:

Active Disturbance Rejection Control (ADRC) is a recently proposed concept, which features high control performances and the minimal dependence on knowledge of the process model. Hence, ADRC represents a suitable solution for the industrial control applications, where the precise mathematical modeling of the process is limited. This dissertation deals with the design and realization of the ADRC controllers. The contribution of the research is reflected in the proposed modifications of the existing ADRC structures, which enable more efficient sinusoidal disturbances rejection and the sinusoidal reference tracking. The high performances and the robustness of the developed algorithms are demonstrated through the frequency domain analysis. Further, the optimal controller parameters tuning method, which is based on the genetic algorithm, is proposed. Compared to the conventional parameter tuning, it has been shown that the optimally tuned system, for the same robustness and noise sensitivity indexes, provides significantly better performances in terms of the external disturbance rejection and the reference tracking. The practical realization of the control systems, using Field Programmable Gate Array (FPGA) hardware, is analyzed. In this context, the features of the modern FPGA chips are considered and a detailed methodology for the control algorithm implementation, by the graphical system-level software tools, is suggested. In this way, the practical realization of the control system and the selection of the optimal hardware structure, as a tradeoff between the system performances and resource occupancy, are simplified. Consequently, the proposed methodology contributes to reducing the gap between FPGA technology and the control system designers. The developed control system solutions are experimentally tested in the laboratory environment on the three-axis didactic radar platform. The obtained results of the axes tracking performances confirm the efficiency of the proposed control algorithm and its FPGA realization.